Mission Critical Performance at the International Solid State Circuits Conference

My name is Pauline Nist (yes, the National  Institute  of Standards and Technology stole my name).  I've been involved in the design and delivery of Mission Critical server systems for most of my life (there was a brief stint in IT early in my career--good training).

I worked on a lot of Vaxes and Alphas for DEC, then moved to Tandem where I was responsible for the NonStop hardware and software - including the SQL MX database.  Then I moved into the "merger" phase of my career, were Tandem was acquired by Compaq, who then also bought DEC. Finally it was all swallowed by HP. There was a lot of indigestion to go around during these years.

Looking for a significant change of pace, I moved to Penguin Computing , a clustered Linux server startup.  Penguin sells to high performance computing and web customers, but I found that startups also teach you a lot about cash accounting.

Now I'm at Intel. Quite the change, but in many ways a logical progression to what is now the emerging way to deliver Mission Critical computing

It's been an exciting week here in the server world at Intel.  The International Solid State Circuits Conference was held here in San Francisco.  It is the place to get previews and hints about future chip products (without the vendors actually announcing availability etc.) from all the chip designers, including, Intel, AMD, IBM etc.

Intel presented a couple of exciting papers.

The first paper  is on the new next generation 8 core Itanium chip, code named Poulson.  It's a 32nm 3.1 Billion transistor chip with a new 12 wide-issue micro architecture.  I haven't managed to find the papers posted publically yet, so I'm including links to some  reports from attendees for now.  For an outside perspective on the Itanium-Poulson chip design, here is a great summary of the processor technology.  This chip is going to allow our OEM partners to deliver some powerful UNIX servers. It's socket compatible with the previous Tukwila (Itanium 9300 series) generation  which should provide an easy upgrade path.

We also presented the new Westmere generation of Xeon server chips which have 10 dual threaded cores, and will be  available in 2, 4 and 8 socket configurations as well as larger Xeon systems using node controller configurations.   They all run on Intel's 32nm process and are compatible with the Boxboro-EX platform.   This is going to provide a great server upgrade story for all of the OEMs who launched Nehalem servers approximately a year ago.  Westmere will  provide increased performance for workloads like database, ERP, BI, server consolidaton and cloud.   Here's a very pretty picture (literally)


Lastly, for extra credit, I wanted to make sure you caught up with President Obama's visit to our Hillsboro Oregon FAB (chip factory). Certainly the biggest thing to hit Hillsboro in awhile.

Intel CEO Paul Otellini also announced a new $5B+ Intel factory in Arizona.