Texas Advanced Computing Center Reaches Key Milestone with Intel Xeon Phi Processors

Congratulations are in order for the Texas Advanced Computing Center (TACC), which is dedicating its Stampede 2 supercomputer today. TACC, located at the University of Texas at Austin, designs and operates some of the world’s most powerful computing resources for scientific researchers. That is certainly the case with Stampede 2, which comes out of the gate ranked 12th on the June 2017 Top500 List of the world’s largest supercomputers.

Like its first-generation Stampede predecessor, Stampede 2 will serve as a strategic national resource that provides high-performance computing (HPC) capabilities to thousands of researchers across the United States and is supported by National Science Foundation grants. It will help TACC fulfill its mission to enable discoveries that advance science and society through the application of advanced computing technologies.

In one recent count, TACC was currently supporting 196 research projects from 113 institutions that are exploring 58 fields of science. These projects span the wide world of science, from exploring the physical processes responsible for the thermal and geological evolution of the planet to designing more fuel-efficient aircraft. For a taste of some of the exciting research that TACC is supporting, check out the organization’s stories on Fighting Cancer with Supercomputers, which range from designing new tools for cancer detection to mining data for clues to new cancer treatments.

Stampede 2 was the result of a collaborative effort by TACC and its technology partners, including Intel. The system is funded by the National Science Foundation and operated by a team of supercomputing experts from TACC, the University of Texas at El Paso, Clemson University, Cornell University, the University of Colorado, Indiana University, and Ohio State University.

In its current Phase 1 deployment, Stampede 2 is powered by 4,200 Intel® Xeon Phi™ processors, and benefits from leading HPC interconnect Intel® Omni-Path Architecture. Intel Xeon Phi processors are an ideal solution for running the workloads in Stampede 2, because they are optimized for HPC and highly parallel workloads and they are extremely power-efficient, which helps TACC achieve a lower total cost of ownership in comparison to more power-hungry processors. They also offer the confidence of instruction set compatibility and familiar programming models that come with Intel® architecture and its ability to run the same x86 code across Intel® Xeon® and Intel Xeon Phi processor based platforms.

Looking ahead, there are more great things in store for the Stampede 2 system. In Phase 2 of the deployment, which begins this month, TACC will add 3,472 Intel® Xeon® Scalable processors, giving researchers more choices on where to run their workloads. With up to 28 cores, six DDR4 memory channels, 48 PCI Express* lanes, support for the Intel® Advanced Vector Extension 512 (Intel® AVX-512) instruction set, and the power of Intel’s broad array of software development tools and libraries, the Intel Xeon Scalable platform can yield performance improvements of up to 1.73x for HPC workloads when compared to the previous generation[1]. It will be exciting to see Intel Xeon Scalable processors accelerate throughput for TACC's most compute- and data-intensive workloads.

At both a personal and a professional level, it’s gratifying to see all the great work being done by researchers who are capitalizing on TACC’s resources to develop new cancer therapies, analyze the geological evolution of the Earth, and shed light on some of the mysteries of the cosmos. At Intel, we continually work to deliver ever-more advanced computing technologies, not for the sake of Moore’s Law but for the benefit of the brilliant people who use our platforms to achieve great things. And that’s really the story behind Stampede 2.

To learn more about TACC and the exciting research that is under way in the Stampede environment, visit https://www.tacc.utexas.edu/-/stampede2-storms-out-of-the-corral-in-support-of-u-s-scientists. And for a closer look at Intel technologies for HPC environments, visit intel.com/ssf.

[1] Up to 1.73x claim based on LAMMPS: LAMMPS is a classical molecular dynamics code and an acronym for Large-scale Atomic/Molecular Massively Parallel Simulator. It is used to simulate the movement of atoms to develop better therapeutics, improve alternative energy devices, develop new materials, and more. E5-2697 v4: 2S Intel® Xeon® processor E5-2697 v4, 2.3GHz, 36 cores, Intel® Turbo Boost Technology and Intel® Hyperthreading Technology on, BIOS 86B0271.R00, 8x16GB 2400MHz DDR4, Red Hat Enterprise Linux* 7.2 kernel 3.10.0-327. Gold 6148: 2S Intel® Xeon® Gold 6148 processor, 2.4GHz, 40 cores, Intel® Turbo Boost Technology and Intel® Hyperthreading Technology on, BIOS 86B.01.00.0412.R00, 12x16GB 2666MHz DDR4, Red Hat Enterprise Linux* 7.2 kernel 3.10.0-327.
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Trish Damkroger

About Trish Damkroger

Trish Damkroger is Vice President of Intel’s Data Center Group and General Manager of its Technical Computing Initiative. Her work helps shape Intel’s high-performance computing (HPC) products and services for the technical market segment. Under this umbrella are the next-generation platform technologies and frameworks that will take Intel toward exascale and advance the convergence of traditional HPC, big data, and artificial intelligence workloads. Damkroger has more than 27 years of experience in technical and managerial roles both in the private sector and during her 15-year career within the United States Department of Energy. While at the Department of Energy, she served most recently as the Associate Director of Computation (Acting) at Lawrence Livermore National Laboratory leading a 1,000 person group that is one of the world’s leading teams of supercomputing and scientific experts. Since 2006, Damkroger has been a leader of the annual Supercomputing Conference series, the premier international meeting for high performance computing. She was the SC14 General Chair, headed the SC15 steering committee, led the SC16 Diverse HPC Workforce Committee, and has signed on as Vice Chair of SC18. Damkroger is also a certified coach and a strong advocate for women in science, technology, engineering, and math (STEM). Damkroger was named one of HPCwire’s People to Watch in 2014. She has a master’s degree in electrical engineering from Stanford University.